Journal of Semiconductors(2010年08期)
半導(dǎo)體學(xué)報(bào)(英文版)

目 錄

• First-principles of wurtzite ZnO(0001) and (0001)surface structures
• Young‘s modulus characterization of low-k films of nanoporous Black Diamond~(TM) by surface acoustic waves
• Theoretical study of the SiO_2/Si interface and its effect on energy band profile and MOSFET gate tunneling current
• Theoretical modeling of the interface recombination effect on the performance of Ⅲ-Ⅴtandem solar cells
• Planar nucleation and crystallization in the annealing process of ion implanted silicon
• Photoconductive properties of lead iodide films prepared by electron beam evaporation
• Effect of bath temperature on the properties of CuIn_χGa_(1-χ)Se_2 thin films grown by the electrodeposition technique
• Growth orientation and superconducting properties of YBa_2Cu_3O_(7-δ) films prepared by the low-fluorine sol-gel process
• Low-temperature deposition of transparent conducting Mn-W co-doped ZnO thin films
• A high-performance enhancement-mode AIGaN/GaN HEMT
• Above 700 V superjunction MOSFETs fabricated by deep trench etching and epitaxial growth
• Diagram representations of charge pumping processes in CMOS transistors
• Simulation of carrier transport in heterostructures using the 2D self-consistent full-band ensemble Monte Carlo method
• A novel method for measuring carrier lifetime and capture cross-section by using the negative resistance I-V characteristics of a barrier-type thyristor
• Design and application of a depletion-mode NJFET in a high-voltage BiCMOS process
• Influence of Ni Schottky contact thickness on two-dimensional electron-gas sheet carrier concentration of strained Al_(0.3)Ga_(0.7)N/GaN heterostructures
• Two-dimensional threshold voltage analytical model of DMG strained-silicon-on-insulator MOSFETs
• Design and optimization of a monolithic GaInP/GaInAs tandem solar cell
• Chlorine gas sensors using hybrid organic semiconductors of PANI/ZnPcCl_(16)
• A novel closed-form resistance model for trapezoidal interconnects
• A new integrated SOI power device based on self-isolation technology
• 4 GHz bit-stream adder based on ∑△ modulation
• A low power fast-settling frequency-presetting PLL frequency synthesizer
• DCM,FSM,dead time and width controllers for a high frequency high efficiency buck DC-DC converter over a wide load range
• A low jitter,low spur multiphase phase-locked loop for an IR-UWB receiver
• A fully integrated UHF RFID reader SoC for handheld applications in the 0.18 μm CMOS process
• A full on-chip CMOS low-dropout voltage regulator with VCCS compensation
• Design and realization of an ultra-low-power low-phase-noise CMOS LC-VCO
• A self-adaptive full asynchronous bi-directional transmission channel for network-on-chips
• A 0.8 V low power low phase-noise PLL
• An efficient dose-compensation method for proximity effect correction